Digital Logic Fundamentals

Digital Logic Fundamentals

Use this page to revise the combinational and sequential building blocks behind MCU pins and simple glue logic.

Combinational logic

AND / OR / NOT / XOR and truth tables. A multiplexer selects; a decoder expands an address. Propagation delay is why "instant" logic is not instant.

Sequential logic

A flip-flop stores one bit, triggered by a clock. Registers are banks of flip-flops. A finite state machine is combinational next-state logic plus registers.

Why firmware people care

Pin behaviour, SPI/I²C timing, and "wait for the clock edge" all come from this model. You do not need to synthesise an FPGA in year 2, but you should be able to read a simple timing diagram.

Starting Points

• Firmware architecture (state machines in software).
• Any short digital-logic chapter (e.g. Harris & Harris, Digital Design and Computer Architecture, introductory chapters).

Key Points

• You can fill a truth table for AND, OR, NOT, XOR.
• You can explain what a clocked flip-flop stores and why a clock is needed.
• You can describe a finite state machine as state + next-state + outputs.
• You can relate a timing diagram (setup/hold, clock edge) to talking to a chip over a bus.